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Diploma Level

Digital System Design Laboratory

Digital System Design Laboratory complements the Digital System Design theory course by providing practical exposure to FPGA-based digital design. Students gain hands-on experience through the online laboratory by developing digital systems using Verilog HDL, performing simulation and hardware implementation, and analyzing functionality and timing. These designs are then implemented, validated, and evaluated on FPGA hardware during the in-person laboratory sessions.

Code EE2902
Credits 1 Credits
Type Diploma
Prerequisites None
Co-requisites
Faculty & Experts

About the Instructors

Prof. Nitin Chandrachoodan

Prof. Nitin Chandrachoodan

Professor , Department of Electrical Engineering , IIT Madras

Nitin Chandrachoodan received his BTech (electronics and communication engineering) from IIT Madras in 1996, and PhD from the University of Maryland at College Park in 2002, in the area of high-level synthesis techniques for mapping DSP algorithms to architectures. He has been with the department of electrical engineering at IIT Madras since 2004, where he is currently an professor.

His research interests include digital systems design and design automation tools and techniques, as well as design of embedded systems with a special focus on assistive technologies. He has taught graduate courses on digital integrated circuit design and on mapping algorithms to architectures, and a UG course on data structures and algorithms, as well as a laboratory course on digital design using FPGAs. He is an associate editor of the Springer Journal of Signal Processing Systems.