Degree Level
Digital IC Design
This is a most fundamental Digital Circuit Design course for pursuing a major in VLSI. We discuss transistor level circuit design concepts in great detail. Learning objectives of this course are: • Characterize the key delay quantities of a standard cell • Evaluate power dissipated in a circuit (dynamic and leakage) • Design a circuit to perform a certain functionality with specified speed • Identify the critical path of a combinational circuit • Convert the combinational block to pipelined circuit • Calculate the maximum (worst case) operating frequency of the designed circuit
Code
EE5102
Credits
4 Credits
Type
Degree
Prerequisites
None
12-Week Roadmap
Course Structure & Syllabus
For details of standard term assessment timelines and exam structures, visit our Academics page.
Module 1
The CMOS Inverter construction and Voltage Transfer Characteristics
Module 2
Resistance and Capacitance and transient response.
Module 3
Dynamic, Short Circuit and Leakage power – Stacking Effect
Module 4
Combinational Circuit Design and capacitance
Reading List
Prescribed Books & References
- Digital Integrated Circuits Jan M. Rabaey, Anantha Chandrakasan and Borivoje Nikolic 2nd Edition, Prentice Hall India, 2003
- CMOS VLSI Design, Neil H.E. Weste, David Harris and Ayan Banerjee, 3rd Edition, Pearson Education, 2012
- Prof. Vinita Vasudevan's lecture notes on adders and multipliers [http://www.ee.iitm.ac.in/vinita/digic.html]